/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.abs.ll | 62 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 80 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 87 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v1 124 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v4 126 ; GFX6-NEXT: v_max_i32_e32 v1, v1, v4 128 ; GFX6-NEXT: v_max_i32_e32 v2, v2, v4 130 ; GFX6-NEXT: v_max_i32_e32 v3, v3, v4 140 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v4 142 ; GFX8-NEXT: v_max_i32_e32 v1, v1, v4 144 ; GFX8-NEXT: v_max_i32_e32 v2, v2, v4 [all …]
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H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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H A D | ssubsat.ll | 12 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 126 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 242 ; GFX6-NEXT: v_max_i32_e32 v4, -1, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v4, v1 254 ; GFX6-NEXT: v_max_i32_e32 v3, -1, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v3, v2 486 ; GFX6-NEXT: v_max_i32_e32 v8, -1, v0 495 ; GFX6-NEXT: v_max_i32_e32 v1, v8, v1 [all …]
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H A D | saddsat.ll | 13 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 127 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 247 ; GFX6-NEXT: v_max_i32_e32 v4, 0, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v5, v1 255 ; GFX6-NEXT: v_max_i32_e32 v3, 0, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v4, v2 493 ; GFX6-NEXT: v_max_i32_e32 v8, 0, v0 501 ; GFX6-NEXT: v_max_i32_e32 v5, 0, v1 [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.abs.ll | 62 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 80 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 87 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v1 124 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v4 126 ; GFX6-NEXT: v_max_i32_e32 v1, v1, v4 128 ; GFX6-NEXT: v_max_i32_e32 v2, v2, v4 130 ; GFX6-NEXT: v_max_i32_e32 v3, v3, v4 140 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v4 142 ; GFX8-NEXT: v_max_i32_e32 v1, v1, v4 144 ; GFX8-NEXT: v_max_i32_e32 v2, v2, v4 [all …]
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H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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H A D | ssubsat.ll | 12 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 126 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 242 ; GFX6-NEXT: v_max_i32_e32 v4, -1, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v4, v1 254 ; GFX6-NEXT: v_max_i32_e32 v3, -1, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v3, v2 486 ; GFX6-NEXT: v_max_i32_e32 v8, -1, v0 495 ; GFX6-NEXT: v_max_i32_e32 v1, v8, v1 [all …]
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H A D | saddsat.ll | 13 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 127 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 247 ; GFX6-NEXT: v_max_i32_e32 v4, 0, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v5, v1 255 ; GFX6-NEXT: v_max_i32_e32 v3, 0, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v4, v2 493 ; GFX6-NEXT: v_max_i32_e32 v8, 0, v0 501 ; GFX6-NEXT: v_max_i32_e32 v5, 0, v1 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.abs.ll | 62 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 80 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 87 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v1 124 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v4 126 ; GFX6-NEXT: v_max_i32_e32 v1, v1, v4 128 ; GFX6-NEXT: v_max_i32_e32 v2, v2, v4 130 ; GFX6-NEXT: v_max_i32_e32 v3, v3, v4 140 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v4 142 ; GFX8-NEXT: v_max_i32_e32 v1, v1, v4 144 ; GFX8-NEXT: v_max_i32_e32 v2, v2, v4 [all …]
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H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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H A D | saddsat.ll | 14 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 128 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 246 ; GFX6-NEXT: v_max_i32_e32 v4, 0, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v5, v1 255 ; GFX6-NEXT: v_max_i32_e32 v3, 0, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v4, v2 492 ; GFX6-NEXT: v_max_i32_e32 v8, 0, v0 501 ; GFX6-NEXT: v_max_i32_e32 v5, 0, v1 [all …]
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H A D | ssubsat.ll | 12 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 126 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 242 ; GFX6-NEXT: v_max_i32_e32 v4, -1, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v4, v1 254 ; GFX6-NEXT: v_max_i32_e32 v3, -1, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v3, v2 486 ; GFX6-NEXT: v_max_i32_e32 v8, -1, v0 495 ; GFX6-NEXT: v_max_i32_e32 v1, v8, v1 [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.abs.ll | 62 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 80 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 87 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v1 124 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v4 126 ; GFX6-NEXT: v_max_i32_e32 v1, v1, v4 128 ; GFX6-NEXT: v_max_i32_e32 v2, v2, v4 130 ; GFX6-NEXT: v_max_i32_e32 v3, v3, v4 140 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v4 142 ; GFX8-NEXT: v_max_i32_e32 v1, v1, v4 144 ; GFX8-NEXT: v_max_i32_e32 v2, v2, v4 [all …]
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H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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H A D | ssubsat.ll | 12 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 126 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 242 ; GFX6-NEXT: v_max_i32_e32 v4, -1, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v4, v1 254 ; GFX6-NEXT: v_max_i32_e32 v3, -1, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v3, v2 486 ; GFX6-NEXT: v_max_i32_e32 v8, -1, v0 495 ; GFX6-NEXT: v_max_i32_e32 v1, v8, v1 [all …]
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H A D | saddsat.ll | 13 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 127 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 247 ; GFX6-NEXT: v_max_i32_e32 v4, 0, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v5, v1 255 ; GFX6-NEXT: v_max_i32_e32 v3, 0, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v4, v2 493 ; GFX6-NEXT: v_max_i32_e32 v8, 0, v0 501 ; GFX6-NEXT: v_max_i32_e32 v5, 0, v1 [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.abs.ll | 62 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 80 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v1 87 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v1 124 ; GFX6-NEXT: v_max_i32_e32 v0, v0, v4 126 ; GFX6-NEXT: v_max_i32_e32 v1, v1, v4 128 ; GFX6-NEXT: v_max_i32_e32 v2, v2, v4 130 ; GFX6-NEXT: v_max_i32_e32 v3, v3, v4 140 ; GFX8-NEXT: v_max_i32_e32 v0, v0, v4 142 ; GFX8-NEXT: v_max_i32_e32 v1, v1, v4 144 ; GFX8-NEXT: v_max_i32_e32 v2, v2, v4 [all …]
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H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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H A D | saddsat.ll | 13 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 127 ; GFX6-NEXT: v_max_i32_e32 v2, 0, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v3, v1 247 ; GFX6-NEXT: v_max_i32_e32 v4, 0, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v5, v1 255 ; GFX6-NEXT: v_max_i32_e32 v3, 0, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v4, v2 493 ; GFX6-NEXT: v_max_i32_e32 v8, 0, v0 501 ; GFX6-NEXT: v_max_i32_e32 v5, 0, v1 [all …]
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H A D | ssubsat.ll | 12 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 17 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 126 ; GFX6-NEXT: v_max_i32_e32 v2, -1, v0 131 ; GFX6-NEXT: v_max_i32_e32 v1, v2, v1 242 ; GFX6-NEXT: v_max_i32_e32 v4, -1, v0 249 ; GFX6-NEXT: v_max_i32_e32 v1, v4, v1 254 ; GFX6-NEXT: v_max_i32_e32 v3, -1, v1 258 ; GFX6-NEXT: v_max_i32_e32 v2, v3, v2 486 ; GFX6-NEXT: v_max_i32_e32 v8, -1, v0 495 ; GFX6-NEXT: v_max_i32_e32 v1, v8, v1 [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | minmaxabs.ll | 48 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v1 97 ; CHECK-NEXT: v_max_i32_e32 v0, v0, v4 98 ; CHECK-NEXT: v_max_i32_e32 v1, v1, v5 99 ; CHECK-NEXT: v_max_i32_e32 v2, v2, v6 100 ; CHECK-NEXT: v_max_i32_e32 v3, v3, v7
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | sminmax.ll | 24 ; GCN: v_max_i32_e32 {{v[0-9]+}}, [[SRC]], [[NEG]] 45 ; GCN: v_max_i32_e32 [[MAX:v[0-9]+]], [[SRC]], [[NEG]] 87 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC0]], [[NEG0]] 88 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC1]], [[NEG1]] 159 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC0]], [[NEG0]] 160 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC1]], [[NEG1]] 161 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC2]], [[NEG2]] 162 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC3]], [[NEG3]] 219 ; GCN-DAG: v_max_i32_e32 v{{[0-9]+}}, [[VAL0]], [[VAL1]]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | sminmax.ll | 24 ; GCN: v_max_i32_e32 {{v[0-9]+}}, [[SRC]], [[NEG]] 45 ; GCN: v_max_i32_e32 [[MAX:v[0-9]+]], [[SRC]], [[NEG]] 87 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC0]], [[NEG0]] 88 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC1]], [[NEG1]] 159 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC0]], [[NEG0]] 160 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC1]], [[NEG1]] 161 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC2]], [[NEG2]] 162 ; GCN-DAG: v_max_i32_e32 {{v[0-9]+}}, [[SRC3]], [[NEG3]] 219 ; GCN-DAG: v_max_i32_e32 v{{[0-9]+}}, [[VAL0]], [[VAL1]]
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