| /dports/lang/gcc6-aux/gcc-6-20180516/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
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| H A D | vqdmlsl_laneq_s32.c | 11 return vqdmlsl_laneq_s32 (a, b, c, 0); in t_vqdmlsl_lane_s32()
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| /dports/lang/gcc10/gcc-10.3.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
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| H A D | vqdmlsl_laneq_s32.c | 11 return vqdmlsl_laneq_s32 (a, b, c, 0); in t_vqdmlsl_lane_s32()
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| /dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
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| H A D | vqdmlsl_laneq_s32.c | 11 return vqdmlsl_laneq_s32 (a, b, c, 0); in t_vqdmlsl_lane_s32()
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| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
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| H A D | vqdmlsl_laneq_s32.c | 11 return vqdmlsl_laneq_s32 (a, b, c, 0); in t_vqdmlsl_lane_s32()
|
| /dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
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| H A D | vqdmlsl_laneq_s32.c | 11 return vqdmlsl_laneq_s32 (a, b, c, 0); in t_vqdmlsl_lane_s32()
|
| /dports/lang/gcc9-aux/gcc-9.1.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
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| H A D | vqdmlsl_laneq_s32.c | 11 return vqdmlsl_laneq_s32 (a, b, c, 0); in t_vqdmlsl_lane_s32()
|
| /dports/lang/gcc9-devel/gcc-9-20211007/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/lang/gcc11-devel/gcc-11-20211009/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/lang/gcc8/gcc-8.5.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/devel/avr-gcc/gcc-10.2.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/devel/riscv64-gcc/gcc-8.3.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/lang/gnat_util/gcc-6-20180516/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/lang/gcc11/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/lang/gcc9/gcc-9.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/lang/gcc10-devel/gcc-10-20211008/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/gcc.target/aarch64/simd/ |
| H A D | vqdmlsl_laneq_s32_indices_1.c | 18 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1); in main()
20 vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4); in main()
|
| /dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/testsuite/gcc.target/aarch64/ |
| H A D | vqdmlsl_laneq_s32.c | 11 return vqdmlsl_laneq_s32 (a, b, c, 0); in t_vqdmlsl_lane_s32()
|