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Searched refs:write_port_enable (Results 1 – 1 of 1) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/white_rabbit/wr_cores_v4_2/ip_cores/general-cores/modules/wishbone/wb_lm32/generated/
H A Dlm32_allprofiles.v8896 wire write_port_enable; net
9008 .enable_write (write_port_enable),
9034 .enable_write (write_port_enable),
9151 assign write_port_enable = (refill_ready == 1'b1) || !stall_m;
21835 wire write_port_enable; net
21947 .enable_write (write_port_enable),
21973 .enable_write (write_port_enable),
22090 assign write_port_enable = (refill_ready == 1'b1) || !stall_m;