Home
last modified time | relevance | path

Searched refs:AFMT_60958_2 (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h66 SRI(AFMT_60958_2, DIG, id), \
190 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\
191 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\
192 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\
193 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\
194 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\
195 SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\
652 uint32_t AFMT_60958_2; member
H A Ddce_stream_encoder.c1396 REG_UPDATE_6(AFMT_60958_2, in dce110_se_setup_hdmi_audio()
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.h53 SRI(AFMT_60958_2, DIG, id), \
119 uint32_t AFMT_60958_2; member
H A Ddcn10_stream_encoder.c1254 REG_UPDATE_6(AFMT_60958_2, in enc1_se_setup_hdmi_audio()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c1667 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, 3); in dce_v10_0_afmt_setmode()
1668 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, 4); in dce_v10_0_afmt_setmode()
1669 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, 5); in dce_v10_0_afmt_setmode()
1670 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, 6); in dce_v10_0_afmt_setmode()
1671 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, 7); in dce_v10_0_afmt_setmode()
1672 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, 8); in dce_v10_0_afmt_setmode()
H A Ddce_v11_0.c1709 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, 3); in dce_v11_0_afmt_setmode()
1710 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, 4); in dce_v11_0_afmt_setmode()
1711 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, 5); in dce_v11_0_afmt_setmode()
1712 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, 6); in dce_v11_0_afmt_setmode()
1713 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, 7); in dce_v11_0_afmt_setmode()
1714 tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, 8); in dce_v11_0_afmt_setmode()
/dragonfly/sys/dev/drm/radeon/
H A Devergreen_hdmi.c390 WREG32(AFMT_60958_2 + offset, in dce4_set_audio_packet()
H A Drv770d.h839 #define AFMT_60958_2 0x74f0 macro
H A Devergreend.h696 #define AFMT_60958_2 0x7120 macro