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Searched refs:AFMT_AUDIO_PACKET_CONTROL (Results 1 – 13 of 13) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Devergreen_hdmi.c406 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset, in dce4_set_audio_packet()
443 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
449 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
453 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_hdmi_enable()
483 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_dp_enable()
509 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, in evergreen_dp_enable()
H A Dr600.c3659 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~HDMI0_AZ_FORMAT_WTRIG_MASK; in r600_disable_interrupt_state()
3660 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp); in r600_disable_interrupt_state()
3661 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) & ~HDMI0_AZ_FORMAT_WTRIG_MASK; in r600_disable_interrupt_state()
3662 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp); in r600_disable_interrupt_state()
3805 hdmi0 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~AFMT_AZ_FORMAT_WTRIG_MASK; in r600_irq_set()
3901 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, hdmi0); in r600_irq_set()
3902 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, hdmi1); in r600_irq_set()
4013 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0); in r600_irq_ack()
4015 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp); in r600_irq_ack()
4018 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1); in r600_irq_ack()
[all …]
H A Ddce3_1_afmt.c222 WREG32(AFMT_AUDIO_PACKET_CONTROL + offset, in dce3_2_set_audio_packet()
H A Drv770d.h851 #define AFMT_AUDIO_PACKET_CONTROL 0x7604 macro
H A Devergreend.h709 #define AFMT_AUDIO_PACKET_CONTROL 0x712c macro
H A Dr600d.h1231 #define AFMT_AUDIO_PACKET_CONTROL 0x7604 macro
H A Devergreen.c4581 rdev, AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i], in evergreen_irq_set()
4637 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i], in evergreen_irq_ack()
/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h61 SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
175 SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\
202 SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh)
647 uint32_t AFMT_AUDIO_PACKET_CONTROL; member
H A Ddce_stream_encoder.c1338 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce110_se_setup_hdmi_audio()
1424 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce110_se_setup_dp_audio()
1506 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, !mute); in dce110_se_audio_mute_control()
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.c1193 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in enc1_se_setup_hdmi_audio()
1283 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in enc1_se_setup_dp_audio()
1366 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, !mute); in enc1_se_audio_mute_control()
H A Ddcn10_stream_encoder.h48 SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
114 uint32_t AFMT_AUDIO_PACKET_CONTROL; member
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c1642 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce_v10_0_afmt_setmode()
1711 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1); in dce_v10_0_afmt_setmode()
H A Ddce_v11_0.c1684 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1); in dce_v11_0_afmt_setmode()
1753 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1); in dce_v11_0_afmt_setmode()