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Searched refs:AR_DLCL_IFS (Results 1 – 12 of 12) sorted by relevance

/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_radar.c445 OS_REG_WRITE(ah, AR_DLCL_IFS(q),
460 OS_REG_WRITE(ah, AR_DLCL_IFS(0), 0x05fffc0f);
461 OS_REG_WRITE(ah, AR_DLCL_IFS(1), 0x05f0fc0f);
462 OS_REG_WRITE(ah, AR_DLCL_IFS(2), 0x05f03c07);
463 OS_REG_WRITE(ah, AR_DLCL_IFS(3), 0x05f01c03);
H A Dar9300_xmit.c326 OS_REG_WRITE(ah, AR_DLCL_IFS(q), SM(cw_min, AR_D_LCL_IFS_CWMIN) in ar9300_reset_tx_queue()
407 OS_REG_WRITE(ah, AR_DLCL_IFS(q), SM(0, AR_D_LCL_IFS_CWMIN) in ar9300_reset_tx_queue()
H A Dar9300_tx99_tgt.c509 OS_REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); in ar9300_tx99_tgt_start()
H A Dar9300reg.h663 #define AR_DLCL_IFS(_i) (AR_D0_LCL_IFS + ((_i)<<2)) macro
664 #define AR_D9_LCL_IFS AR_DLCL_IFS(9)
H A Dar9300_xmit_ds.c498 OS_REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); in ar9300__cont_tx_mode()
H A Dar9300_misc.c3812 OS_REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); in ar9300_tx99_start()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
H A Dar5211reg.h158 #define AR_DLCL_IFS(i) (AR_D0_LCL_IFS + ((i)<<2)) macro
H A Dar5211_xmit.c268 OS_REG_WRITE(ah, AR_DLCL_IFS(q), in ar5211ResetTxQueue()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212reg.h179 #define AR_DLCL_IFS(_i) (AR_D0_LCL_IFS + ((_i)<<2)) macro
H A Dar5212_xmit.c307 OS_REG_WRITE(ah, AR_DLCL_IFS(q), in ar5212ResetTxQueue()
/dragonfly/tools/tools/ath/athregs/
H A Ddumpregs.c568 , OS_REG_READ(ah, AR_DLCL_IFS(i)) in ath_hal_dumpdcu()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_xmit.c1277 OS_REG_WRITE(ah, AR_DLCL_IFS(q), in ar5416ResetTxQueue()