Searched refs:AR_DLCL_IFS (Results 1 – 12 of 12) sorted by relevance
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | ar9300_radar.c | 445 OS_REG_WRITE(ah, AR_DLCL_IFS(q), 460 OS_REG_WRITE(ah, AR_DLCL_IFS(0), 0x05fffc0f); 461 OS_REG_WRITE(ah, AR_DLCL_IFS(1), 0x05f0fc0f); 462 OS_REG_WRITE(ah, AR_DLCL_IFS(2), 0x05f03c07); 463 OS_REG_WRITE(ah, AR_DLCL_IFS(3), 0x05f01c03);
|
H A D | ar9300_xmit.c | 326 OS_REG_WRITE(ah, AR_DLCL_IFS(q), SM(cw_min, AR_D_LCL_IFS_CWMIN) in ar9300_reset_tx_queue() 407 OS_REG_WRITE(ah, AR_DLCL_IFS(q), SM(0, AR_D_LCL_IFS_CWMIN) in ar9300_reset_tx_queue()
|
H A D | ar9300_tx99_tgt.c | 509 OS_REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); in ar9300_tx99_tgt_start()
|
H A D | ar9300reg.h | 663 #define AR_DLCL_IFS(_i) (AR_D0_LCL_IFS + ((_i)<<2)) macro 664 #define AR_D9_LCL_IFS AR_DLCL_IFS(9)
|
H A D | ar9300_xmit_ds.c | 498 OS_REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); in ar9300__cont_tx_mode()
|
H A D | ar9300_misc.c | 3812 OS_REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); in ar9300_tx99_start()
|
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/ |
H A D | ar5211reg.h | 158 #define AR_DLCL_IFS(i) (AR_D0_LCL_IFS + ((i)<<2)) macro
|
H A D | ar5211_xmit.c | 268 OS_REG_WRITE(ah, AR_DLCL_IFS(q), in ar5211ResetTxQueue()
|
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/ |
H A D | ar5212reg.h | 179 #define AR_DLCL_IFS(_i) (AR_D0_LCL_IFS + ((_i)<<2)) macro
|
H A D | ar5212_xmit.c | 307 OS_REG_WRITE(ah, AR_DLCL_IFS(q), in ar5212ResetTxQueue()
|
/dragonfly/tools/tools/ath/athregs/ |
H A D | dumpregs.c | 568 , OS_REG_READ(ah, AR_DLCL_IFS(i)) in ath_hal_dumpdcu()
|
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/ |
H A D | ar5416_xmit.c | 1277 OS_REG_WRITE(ah, AR_DLCL_IFS(q), in ar5416ResetTxQueue()
|