Searched refs:AR_IMR_S0_QCU_TXDESC (Results 1 – 6 of 6) sorted by relevance
447 #define AR_IMR_S0_QCU_TXDESC 0x03FF0000 /* Mask for TXDESC (QCU 0-9) */ macro
184 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC) in setTxQInterrupts()
493 (AR_IMR_S0_QCU_TXDESC & (AR_QCU_0<<AR_IMR_S0_QCU_TXDESC_S))); in ar5211Reset()
519 #define AR_IMR_S0_QCU_TXDESC 0x03FF0000 /* TXDESC (QCU 0-9) */ macro
217 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC) in setTxQInterrupts()
1222 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC) in setTxQInterrupts()