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Searched refs:AR_IMR_S0_QCU_TXDESC (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
H A Dar5211reg.h447 #define AR_IMR_S0_QCU_TXDESC 0x03FF0000 /* Mask for TXDESC (QCU 0-9) */ macro
H A Dar5211_xmit.c184 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC) in setTxQInterrupts()
H A Dar5211_reset.c493 (AR_IMR_S0_QCU_TXDESC & (AR_QCU_0<<AR_IMR_S0_QCU_TXDESC_S))); in ar5211Reset()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212reg.h519 #define AR_IMR_S0_QCU_TXDESC 0x03FF0000 /* TXDESC (QCU 0-9) */ macro
H A Dar5212_xmit.c217 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC) in setTxQInterrupts()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_xmit.c1222 | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC) in setTxQInterrupts()