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Searched refs:AR_ISR_S3 (Results 1 – 9 of 9) sorted by relevance

/dragonfly/tools/tools/ath/common/
H A Ddumpregs_5211.c65 DEFINT(AR_ISR_S3, "ISR_S3"),
H A Ddumpregs_5212.c74 DEFINT(AR_ISR_S3, "ISR_S3"),
H A Ddumpregs_5416.c77 DEFINT(AR_ISR_S3, "ISR_S3"),
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_interrupts.c109 ah->ah_intrstate[4] = OS_REG_READ(ah, AR_ISR_S3); in ar5416GetPendingInterrupts()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
H A Dar5211reg.h53 #define AR_ISR_S3 0x0090 /* Secondary interrupt status reg 3 */ macro
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212reg.h50 #define AR_ISR_S3 0x0090 /* MAC Secondary interrupt status register 3 */ macro
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_interrupts.c152 ah->ah_intrstate[4] = OS_REG_READ(ah, AR_ISR_S3); in ar9300_get_pending_interrupts()
H A Dar9300reg.h300 #define AR_ISR_S3 AR_MAC_DMA_OFFSET(MAC_DMA_ISR_S3) macro
/dragonfly/tools/tools/ath/athregs/
H A Ddumpregs.c527 , OS_REG_READ(ah, AR_ISR_S3) in ath_hal_dumpint()