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Searched refs:AR_ISR_S4 (Results 1 – 9 of 9) sorted by relevance

/dragonfly/tools/tools/ath/common/
H A Ddumpregs_5211.c66 DEFINT(AR_ISR_S4, "ISR_S4"),
H A Ddumpregs_5212.c75 DEFINT(AR_ISR_S4, "ISR_S4"),
H A Ddumpregs_5416.c78 DEFINT(AR_ISR_S4, "ISR_S4"),
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_interrupts.c110 ah->ah_intrstate[5] = OS_REG_READ(ah, AR_ISR_S4); in ar5416GetPendingInterrupts()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
H A Dar5211reg.h54 #define AR_ISR_S4 0x0094 /* Secondary interrupt status reg 4 */ macro
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212reg.h51 #define AR_ISR_S4 0x0094 /* MAC Secondary interrupt status register 4 */ macro
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_interrupts.c153 ah->ah_intrstate[5] = OS_REG_READ(ah, AR_ISR_S4); in ar9300_get_pending_interrupts()
H A Dar9300reg.h305 #define AR_ISR_S4 AR_MAC_DMA_OFFSET(MAC_DMA_ISR_S4) macro
/dragonfly/tools/tools/ath/athregs/
H A Ddumpregs.c528 , OS_REG_READ(ah, AR_ISR_S4) in ath_hal_dumpint()