| /dragonfly/sys/dev/netif/ath/ath_hal/ar9002/ |
| H A D | ar9280.c | 100 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar9280SetChannel()
103 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar9280SetChannel()
106 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar9280SetChannel()
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| H A D | ar9287.c | 109 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar9287SetChannel()
112 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar9287SetChannel()
115 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar9287SetChannel()
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5416/ |
| H A D | ar2133.c | 157 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar2133SetChannel()
160 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2133SetChannel()
163 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2133SetChannel()
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| H A D | ar5416_reset.c | 1711 … OS_REG_RMW_FIELD(ah, AR_PHY_CCK_TX_CTRL, AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK, pModal->miscBits); in ar5416SetBoardValues()
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5212/ |
| H A D | ar5111.c | 156 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar5111SetChannel()
159 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar5111SetChannel()
162 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar5111SetChannel()
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| H A D | ar2425.c | 101 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar2425SetChannel()
104 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2425SetChannel()
107 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2425SetChannel()
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| H A D | ar2316.c | 120 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar2316SetChannel()
123 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2316SetChannel()
126 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2316SetChannel()
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| H A D | ar2317.c | 97 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar2317SetChannel()
100 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2317SetChannel()
103 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2317SetChannel()
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| H A D | ar2413.c | 107 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar2413SetChannel()
110 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2413SetChannel()
113 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar2413SetChannel()
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| H A D | ar5413.c | 107 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar5413SetChannel()
110 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar5413SetChannel()
113 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar5413SetChannel()
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| H A D | ar5212phy.h | 311 #define AR_PHY_CCK_TX_CTRL 0xA204 macro
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| H A D | ar5112.c | 107 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); in ar5112SetChannel()
110 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar5112SetChannel()
113 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, in ar5112SetChannel()
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| /dragonfly/tools/tools/ath/common/ |
| H A D | dumpregs_5212.c | 405 DEFVOID(AR_PHY_CCK_TX_CTRL, "PHY_CCK_TX_CTRL"),
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| /dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300phy.h | 770 #define AR_PHY_CCK_TX_CTRL AR_SM_OFFSET(BB_bbb_tx_ctrl) macro
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