/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/ |
H A D | ar5416_interrupts.c | 237 OS_REG_WRITE(ah, AR_RC, AR_RC_HOSTIF); in ar5416GetPendingInterrupts() 238 OS_REG_WRITE(ah, AR_RC, 0); in ar5416GetPendingInterrupts()
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H A D | ar5416_power.c | 99 OS_REG_WRITE(ah, AR_RC, AR_RC_AHB|AR_RC_HOSTIF); in ar5416SetPowerModeSleep()
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H A D | ar5416_reset.c | 1320 OS_REG_WRITE(ah, AR_RC, AR_RC_AHB); in ar5416SetResetPowerOn() 1328 OS_REG_WRITE(ah, AR_RC, 0); in ar5416SetResetPowerOn() 1383 OS_REG_WRITE(ah, AR_RC, AR_RC_AHB|AR_RC_HOSTIF); in ar5416SetReset() 1385 OS_REG_WRITE(ah, AR_RC, AR_RC_AHB); in ar5416SetReset() 1412 OS_REG_WRITE(ah, AR_RC, 0); in ar5416SetReset()
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/dragonfly/tools/tools/ath/common/ |
H A D | dumpregs_5210.c | 63 DEFBASICfmt(AR_RC, "RC", AR_RC_BITS),
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H A D | dumpregs_5211.c | 222 DEFBASICfmt(AR_RC, "RC", AR_RC_BITS),
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H A D | dumpregs_5212.c | 251 DEFBASIC(AR_RC, "RC"),
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H A D | dumpregs_5416.c | 256 DEFBASICfmt(AR_RC, "RC",
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/dragonfly/sys/dev/netif/ath/ath_hal/ar5210/ |
H A D | ar5210_reset.c | 592 OS_REG_WRITE(ah, AR_RC, resetMask); in ar5210SetResetReg() 598 rt = ath_hal_wait(ah, AR_RC, mask, resetMask); in ar5210SetResetReg() 970 OS_REG_READ(ah, AR_RC)); in ar5210CalNoiseFloor()
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H A D | ar5210reg.h | 53 #define AR_RC 0x4000 /* Reset control */ macro
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/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | ar9300_interrupts.c | 434 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), AR_RC_HOSTIF); in ar9300_get_pending_interrupts() 435 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), 0); in ar9300_get_pending_interrupts()
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H A D | ar9300_reset.c | 1681 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), AR_RC_HOSTIF); in ar9300_set_reset() 1686 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), AR_RC_HOSTIF); in ar9300_set_reset() 1852 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), 0); in ar9300_set_reset()
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H A D | ar9300_attach.c | 4036 AR_HOSTIF_REG(ah, AR_RC) = in ar9300_init_hostif_offsets() 4151 AR_HOSTIF_REG(ah, AR_RC) = in ar9340_init_hostif_offsets()
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H A D | ar9300.h | 726 u_int32_t AR_RC; member
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/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/ |
H A D | ar5211reg.h | 222 #define AR_RC 0x4000 /* Warm reset control register */ macro
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H A D | ar5211_reset.c | 757 OS_REG_WRITE(ah, AR_RC, resetMask); in ar5211SetResetReg() 764 rt = ath_hal_wait(ah, AR_RC, mask, resetMask); in ar5211SetResetReg()
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/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/ |
H A D | ar5212reg.h | 231 #define AR_RC 0x4000 /* Warm reset control register */ macro
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H A D | ar5212_reset.c | 1273 OS_REG_WRITE(ah, AR_RC, resetMask); in ar5212SetResetReg() 1278 rt = ath_hal_wait(ah, AR_RC, mask, resetMask); in ar5212SetResetReg()
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