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Searched refs:AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h797 #define AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT 0x00000004 macro
H A Ddce_8_0_sh_mask.h12098 #define AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT 0x4 macro
H A Ddce_10_0_sh_mask.h13232 #define AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h13238 #define AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h13854 #define AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT 0x4 macro
H A Ddce_12_0_sh_mask.h6884 #define AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h8019 #define AZALIA_BDL_DMA_CONTROL__BDL_DMA_ISOCHRONOUS__SHIFT … macro