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Searched refs:AZALIA_FIFO_SIZE_CONTROL__MAX_LATENCY_SUPPORT__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h1646 #define AZALIA_FIFO_SIZE_CONTROL__MAX_LATENCY_SUPPORT__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h12212 #define AZALIA_FIFO_SIZE_CONTROL__MAX_LATENCY_SUPPORT__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h13470 #define AZALIA_FIFO_SIZE_CONTROL__MAX_LATENCY_SUPPORT__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h13476 #define AZALIA_FIFO_SIZE_CONTROL__MAX_LATENCY_SUPPORT__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h14092 #define AZALIA_FIFO_SIZE_CONTROL__MAX_LATENCY_SUPPORT__SHIFT 0x10 macro