Searched refs:B0_CTST (Results 1 – 2 of 2) sorted by relevance
/dragonfly/sys/dev/netif/msk/ |
H A D | if_msk.c | 1064 CSR_WRITE_2(sc, B0_CTST, Y2_HW_WOL_ON); in mskc_phy_power() 1142 CSR_WRITE_2(sc, B0_CTST, Y2_ASF_DISABLE); in mskc_reset() 1147 CSR_WRITE_2(sc, B0_CTST, CS_RST_SET); in mskc_reset() 1148 CSR_WRITE_2(sc, B0_CTST, CS_RST_CLR); in mskc_reset() 1158 CSR_WRITE_2(sc, B0_CTST, CS_MRST_CLR); in mskc_reset() 1214 CSR_WRITE_2(sc, B0_CTST, Y2_LED_STAT_ON); in mskc_reset() 1575 CSR_WRITE_2(sc, B0_CTST, CS_RST_CLR); in mskc_attach() 1813 CSR_WRITE_2(sc, B0_CTST, Y2_LED_STAT_OFF); in mskc_detach() 1816 CSR_WRITE_2(sc, B0_CTST, CS_RST_SET); in mskc_detach() 2704 CSR_WRITE_2(sc, B0_CTST, CS_RST_SET); in mskc_shutdown() [all …]
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H A D | if_mskreg.h | 430 #define B0_CTST 0x0004 /* 16 bit Control/Status register */ macro
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