Home
last modified time | relevance | path

Searched refs:CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_sh_mask.h2514 #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 macro
H A Dsmu_7_0_0_sh_mask.h3570 #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 macro
H A Dsmu_7_1_1_sh_mask.h4188 #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 macro
H A Dsmu_7_0_1_sh_mask.h5008 #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 macro
H A Dsmu_7_1_0_sh_mask.h5200 #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 macro
H A Dsmu_7_1_2_sh_mask.h5308 #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 macro
H A Dsmu_7_1_3_sh_mask.h5212 #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 macro