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Searched refs:CG_UPLL_FUNC_CNTL_2 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770.c54 WREG32_P(CG_UPLL_FUNC_CNTL_2, in rv770_set_uvd_clocks()
93 WREG32_P(CG_UPLL_FUNC_CNTL_2, in rv770_set_uvd_clocks()
120 WREG32_P(CG_UPLL_FUNC_CNTL_2, in rv770_set_uvd_clocks()
H A Drv770d.h51 #define CG_UPLL_FUNC_CNTL_2 0x71c macro
H A Dsid.h136 #define CG_UPLL_FUNC_CNTL_2 0x638 macro
H A Dr600.c199 WREG32_P(CG_UPLL_FUNC_CNTL_2, in r600_set_uvd_clocks()
250 WREG32_P(CG_UPLL_FUNC_CNTL_2, in r600_set_uvd_clocks()
277 WREG32_P(CG_UPLL_FUNC_CNTL_2, in r600_set_uvd_clocks()
H A Devergreen.c1181 WREG32_P(CG_UPLL_FUNC_CNTL_2, in evergreen_set_uvd_clocks()
1234 WREG32_P(CG_UPLL_FUNC_CNTL_2, in evergreen_set_uvd_clocks()
1254 WREG32_P(CG_UPLL_FUNC_CNTL_2, in evergreen_set_uvd_clocks()
H A Devergreend.h357 #define CG_UPLL_FUNC_CNTL_2 0x71c macro
H A Dsi.c6998 WREG32_P(CG_UPLL_FUNC_CNTL_2, in si_set_uvd_clocks()
7052 WREG32_P(CG_UPLL_FUNC_CNTL_2, in si_set_uvd_clocks()
7072 WREG32_P(CG_UPLL_FUNC_CNTL_2, in si_set_uvd_clocks()
H A Dr600d.h1568 #define CG_UPLL_FUNC_CNTL_2 0x7e4 macro