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Searched refs:CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h2207 #define CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK 0x01000000L macro
H A Ddce_8_0_sh_mask.h755 #define CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK 0x1000000 macro
H A Ddce_10_0_sh_mask.h831 #define CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK 0x1000000 macro
H A Ddce_11_0_sh_mask.h793 #define CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK 0x1000000 macro
H A Ddce_11_2_sh_mask.h833 #define CRTC_INTERRUPT_CONTROL__CRTC_TRIGA_INT_MSK_MASK 0x1000000 macro