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Searched refs:D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h2554 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x00000008 macro
H A Ddce_8_0_sh_mask.h11066 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_10_0_sh_mask.h11450 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_11_0_sh_mask.h11262 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_11_2_sh_mask.h12516 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_12_0_sh_mask.h2303 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h1749 #define D5VGA_CONTROL__D5VGA_TIMING_SELECT__SHIFT … macro