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Searched refs:D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h2563 #define D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK 0x00000100L macro
H A Ddce_8_0_sh_mask.h11075 #define D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_10_0_sh_mask.h11459 #define D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_11_0_sh_mask.h11271 #define D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_11_2_sh_mask.h12525 #define D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK 0x100 macro
H A Ddce_12_0_sh_mask.h2319 #define D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h1765 #define D6VGA_CONTROL__D6VGA_TIMING_SELECT_MASK … macro