Home
last modified time | relevance | path

Searched refs:DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h2991 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x00000001L macro
H A Ddce_8_0_sh_mask.h1423 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
H A Ddce_10_0_sh_mask.h1451 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h1359 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h1481 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h2525 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h1943 #define DCCG_GTC_CNTL__DCCG_GTC_ENABLE_MASK macro