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Searched refs:DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3022 #define DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT 0x00000018 macro
H A Ddce_8_0_sh_mask.h2024 #define DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT 0x1c macro
H A Ddce_10_0_sh_mask.h1910 #define DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT 0x1c macro
H A Ddce_11_0_sh_mask.h1830 #define DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT 0x1c macro
H A Ddce_11_2_sh_mask.h2034 #define DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT 0x1c macro
H A Ddce_12_0_sh_mask.h3106 #define DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h2539 #define DCCG_TEST_CLK_SEL__DCCG_TEST_CLK_GENERICB_INV__SHIFT … macro