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Searched refs:DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3428 #define DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h3834 #define DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h3738 #define DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h3826 #define DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h4204 #define DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT 0x10 macro
H A Ddce_12_0_sh_mask.h10188 #define DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40798 #define DC_GPIO_DDC6_MASK__AUX_PAD6_MODE__SHIFT macro