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Searched refs:DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4249 #define DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK 0x00020000L macro
H A Ddce_8_0_sh_mask.h6559 #define DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK 0x20000 macro
H A Ddce_10_0_sh_mask.h15834 #define DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK 0x20000 macro
H A Ddce_11_0_sh_mask.h16052 #define DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK 0x20000 macro
H A Ddce_11_2_sh_mask.h16804 #define DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK 0x20000 macro
H A Ddce_12_0_sh_mask.h7476 #define DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h26894 #define DC_I2C_DDC3_HW_STATUS__DC_I2C_DDC3_HW_URG_MASK … macro