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Searched refs:DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4262 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT 0x00000006 macro
H A Ddce_8_0_sh_mask.h6672 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT 0x6 macro
H A Ddce_10_0_sh_mask.h15953 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT 0x6 macro
H A Ddce_11_0_sh_mask.h16171 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT 0x6 macro
H A Ddce_11_2_sh_mask.h16923 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT 0x6 macro
H A Ddce_12_0_sh_mask.h7595 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h27013 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE__SHIFT macro