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Searched refs:DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c114 .vline = DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK,
H A Ddce_v11_0.c116 .vline = DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK,
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5547 #define DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK 0x00000004L macro
H A Ddce_8_0_sh_mask.h7159 #define DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK 0x4 macro
H A Ddce_10_0_sh_mask.h15154 #define DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK 0x4 macro
H A Ddce_11_0_sh_mask.h15300 #define DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK 0x4 macro
H A Ddce_11_2_sh_mask.h15964 #define DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK 0x4 macro
H A Ddce_12_0_sh_mask.h8265 #define DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK … macro