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Searched refs:DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5624 #define DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT 0x0000001a macro
H A Ddce_8_0_sh_mask.h6926 #define DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT 0x1a macro
H A Ddce_10_0_sh_mask.h14923 #define DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT 0x1a macro
H A Ddce_11_0_sh_mask.h15069 #define DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT 0x1a macro
H A Ddce_11_2_sh_mask.h15733 #define DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT 0x1a macro
H A Ddce_12_0_sh_mask.h7984 #define DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h4962 #define DISP_INTERRUPT_STATUS__DMCU_UC_INTERNAL_INT__SHIFT … macro