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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5800 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x0000001a macro
H A Ddce_8_0_sh_mask.h7958 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_10_0_sh_mask.h6986 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_11_0_sh_mask.h6888 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_11_2_sh_mask.h7960 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT 0x1a macro
H A Ddce_12_0_sh_mask.h4859 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h3825 #define DMCU_INTERRUPT_STATUS__VBLANK3_INT_OCCURRED__SHIFT macro