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Searched refs:DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5811 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK 0x20000000L macro
H A Ddce_8_0_sh_mask.h7969 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK 0x20000000 macro
H A Ddce_10_0_sh_mask.h6997 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK 0x20000000 macro
H A Ddce_11_0_sh_mask.h6899 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK 0x20000000 macro
H A Ddce_11_2_sh_mask.h7971 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK 0x20000000 macro
H A Ddce_12_0_sh_mask.h4919 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h3881 #define DMCU_INTERRUPT_STATUS__VBLANK6_INT_OCCURRED_MASK macro