Home
last modified time | relevance | path

Searched refs:DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5959 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x00000020L macro
H A Ddce_8_0_sh_mask.h7747 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_10_0_sh_mask.h6791 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_11_0_sh_mask.h6687 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_11_2_sh_mask.h7767 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_12_0_sh_mask.h4702 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h3672 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro