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Searched refs:DMIF_ADDR_CONFIG__BANK_INTERLEAVE_SIZE__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6022 #define DMIF_ADDR_CONFIG__BANK_INTERLEAVE_SIZE__SHIFT 0x00000008 macro
H A Ddce_8_0_sh_mask.h2266 #define DMIF_ADDR_CONFIG__BANK_INTERLEAVE_SIZE__SHIFT 0x8 macro
H A Ddce_10_0_sh_mask.h2074 #define DMIF_ADDR_CONFIG__BANK_INTERLEAVE_SIZE__SHIFT 0x8 macro
H A Ddce_11_0_sh_mask.h1994 #define DMIF_ADDR_CONFIG__BANK_INTERLEAVE_SIZE__SHIFT 0x8 macro