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Searched refs:DMIF_STATUS2__DMIF_PIPE3_DISPCLK_STATUS__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6080 #define DMIF_STATUS2__DMIF_PIPE3_DISPCLK_STATUS__SHIFT 0x00000003 macro
H A Ddce_8_0_sh_mask.h2352 #define DMIF_STATUS2__DMIF_PIPE3_DISPCLK_STATUS__SHIFT 0x3 macro
H A Ddce_10_0_sh_mask.h2186 #define DMIF_STATUS2__DMIF_PIPE3_DISPCLK_STATUS__SHIFT 0x3 macro
H A Ddce_11_0_sh_mask.h2110 #define DMIF_STATUS2__DMIF_PIPE3_DISPCLK_STATUS__SHIFT 0x3 macro
H A Ddce_11_2_sh_mask.h2306 #define DMIF_STATUS2__DMIF_PIPE3_DISPCLK_STATUS__SHIFT 0x3 macro
H A Ddce_12_0_sh_mask.h3604 #define DMIF_STATUS2__DMIF_PIPE3_DISPCLK_STATUS__SHIFT … macro