Searched refs:DOMAIN0_PG_CONFIG (Results 1 – 2 of 2) sorted by relevance
| /dragonfly/sys/dev/drm/amd/display/dc/dce/ |
| H A D | dce_hwseq.h | 174 SR(DOMAIN0_PG_CONFIG), \
228 uint32_t DOMAIN0_PG_CONFIG; member
388 HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_FORCEON, mask_sh), \
389 HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_GATE, mask_sh), \
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| /dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer.c | 367 REG_UPDATE(DOMAIN0_PG_CONFIG, DOMAIN0_POWER_FORCEON, force_on); in enable_power_gating_plane()
474 if (REG(DOMAIN0_PG_CONFIG) == 0) in hubp_pg_control()
479 REG_UPDATE(DOMAIN0_PG_CONFIG, in hubp_pg_control()
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