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Searched refs:DOMAIN1_PG_STATUS (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_hwseq.h183 SR(DOMAIN1_PG_STATUS), \
237 uint32_t DOMAIN1_PG_STATUS; member
405 HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c430 REG_WAIT(DOMAIN1_PG_STATUS, in dpp_pg_control()