DPLL_CFGCR0_LINK_RATE_4050 (reference) in projects: dragonfly

Searched refs:DPLL_CFGCR0_LINK_RATE_4050 (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A D	intel_dpll_mgr.c	`2329 cfgcr0 \|= DPLL_CFGCR0_LINK_RATE_4050; in cnl_ddi_dp_set_dpll_hw_state()`
H A D	intel_ddi.c	`1340 case DPLL_CFGCR0_LINK_RATE_4050: in cnl_ddi_clock_get()`
H A D	i915_reg.h	`8627 #define DPLL_CFGCR0_LINK_RATE_4050 (7 << 25) macro`