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Searched refs:DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6538 #define DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 0x00000004 macro
H A Ddce_8_0_sh_mask.h9280 #define DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 0x4 macro
H A Ddce_10_0_sh_mask.h8756 #define DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h8440 #define DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h9702 #define DP_SEC_CNTL__DP_SEC_ASP_ENABLE__SHIFT 0x4 macro