Home
last modified time | relevance | path

Searched refs:FBC_COMP_MODE__FBC_IND_EN__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6786 #define FBC_COMP_MODE__FBC_IND_EN__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h9804 #define FBC_COMP_MODE__FBC_IND_EN__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h9334 #define FBC_COMP_MODE__FBC_IND_EN__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h9034 #define FBC_COMP_MODE__FBC_IND_EN__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h10290 #define FBC_COMP_MODE__FBC_IND_EN__SHIFT 0x10 macro
H A Ddce_12_0_sh_mask.h3159 #define FBC_COMP_MODE__FBC_IND_EN__SHIFT macro