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Searched refs:GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/irq/dce80/
H A Dirq_service_dce80.c126 .ack_mask = GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK,\
127 .ack_value = GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK,\
/dragonfly/sys/dev/drm/amd/display/dc/irq/dce110/
H A Dirq_service_dce110.c121 .ack_mask = GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK,\
122 .ack_value = GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK,\
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c3112 GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK); in dce_v10_0_pageflip_irq()
H A Ddce_v11_0.c3238 GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK); in dce_v11_0_pageflip_irq()
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7291 #define GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK 0x00000100L macro
H A Ddce_8_0_sh_mask.h4659 #define GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK 0x100 macro
H A Ddce_10_0_sh_mask.h5193 #define GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK 0x100 macro
H A Ddce_11_0_sh_mask.h5305 #define GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK 0x100 macro
H A Ddce_11_2_sh_mask.h6385 #define GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK 0x100 macro