Searched refs:HDMI_ACR_48_1 (Results 1 – 9 of 9) sorted by relevance
| /dragonfly/sys/dev/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.h | 82 SRI(HDMI_ACR_48_1, DIG, id),\
186 SE_SF(HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\
681 uint32_t HDMI_ACR_48_1; member
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| H A D | dce_stream_encoder.c | 1378 REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz); in dce110_se_setup_hdmi_audio()
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| /dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_stream_encoder.h | 72 SRI(HDMI_ACR_48_1, DIG, id),\
150 uint32_t HDMI_ACR_48_1; member
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| H A D | dcn10_stream_encoder.c | 1233 REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz); in enc1_se_setup_hdmi_audio()
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| /dragonfly/sys/dev/drm/radeon/ |
| H A D | evergreen_hdmi.c | 99 WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz); in evergreen_hdmi_update_acr()
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| H A D | rv770d.h | 797 #define HDMI_ACR_48_1 0x74c0 macro
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| H A D | evergreend.h | 651 #define HDMI_ACR_48_1 0x70f0 macro
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| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | dce_v10_0.c | 1484 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz); in dce_v10_0_afmt_update_ACR()
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| H A D | dce_v11_0.c | 1526 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz); in dce_v11_0_afmt_update_ACR()
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