Searched refs:HDMI_ACR_N_32 (Results 1 – 8 of 8) sorted by relevance
/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_stream_encoder.h | 182 SE_SF(HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\ 261 SE_SF(DIG0_HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\ 456 uint8_t HDMI_ACR_N_32; member 586 uint32_t HDMI_ACR_N_32; member
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H A D | dce_stream_encoder.c | 1366 REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz); in dce110_se_setup_hdmi_audio()
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/dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
H A D | dcn10_stream_encoder.h | 213 SE_SF(DIG0_HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\ 387 type HDMI_ACR_N_32;\
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H A D | dcn10_stream_encoder.c | 1221 REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz); in enc1_se_setup_hdmi_audio()
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/dragonfly/sys/dev/drm/radeon/ |
H A D | rv770d.h | 790 # define HDMI_ACR_N_32(x) (((x) & 0xfffff) << 0) macro
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H A D | evergreend.h | 644 # define HDMI_ACR_N_32(x) (((x) & 0xfffff) << 0) macro
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/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | dce_v10_0.c | 1470 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v10_0_afmt_update_ACR()
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H A D | dce_v11_0.c | 1512 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v11_0_afmt_update_ACR()
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