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Searched refs:HDMI_INFOFRAME_CONTROL0 (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Devergreen_hdmi.c438 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, in evergreen_hdmi_enable()
446 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, in evergreen_hdmi_enable()
455 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0); in evergreen_hdmi_enable()
H A Drv770d.h707 #define HDMI_INFOFRAME_CONTROL0 0x7414 macro
H A Devergreend.h557 #define HDMI_INFOFRAME_CONTROL0 0x7044 macro
/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h72 SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
143 SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, mask_sh),\
151 SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, mask_sh),\
152 SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, mask_sh),\
671 uint32_t HDMI_INFOFRAME_CONTROL0; member
H A Ddce_stream_encoder.c640 REG_UPDATE(HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in dce110_stream_encoder_hdmi_set_stream_attribute()
732 REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0, in dce110_stream_encoder_update_hdmi_info_packets()
740 REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0, in dce110_stream_encoder_update_hdmi_info_packets()
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.h62 SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \
140 uint32_t HDMI_INFOFRAME_CONTROL0; member
H A Ddcn10_stream_encoder.c573 REG_UPDATE(HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in enc1_stream_encoder_hdmi_set_stream_attribute()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c1616 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in dce_v10_0_afmt_setmode()
1618 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_CONT, 1); in dce_v10_0_afmt_setmode()
1700 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, 1); in dce_v10_0_afmt_setmode()
1702 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, 1); in dce_v10_0_afmt_setmode()
H A Ddce_v11_0.c1658 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in dce_v11_0_afmt_setmode()
1660 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_CONT, 1); in dce_v11_0_afmt_setmode()
1742 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, 1); in dce_v11_0_afmt_setmode()
1744 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, 1); in dce_v11_0_afmt_setmode()