Searched refs:HDMI_INFOFRAME_CONTROL1 (Results 1 – 9 of 9) sorted by relevance
/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_stream_encoder.h | 73 SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \ 145 SE_SF(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, mask_sh),\ 153 SE_SF(HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, mask_sh),\ 672 uint32_t HDMI_INFOFRAME_CONTROL1; member
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H A D | dce_stream_encoder.c | 644 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, in dce110_stream_encoder_hdmi_set_stream_attribute() 736 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, in dce110_stream_encoder_update_hdmi_info_packets()
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/dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
H A D | dcn10_stream_encoder.h | 63 SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \ 141 uint32_t HDMI_INFOFRAME_CONTROL1; member
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H A D | dcn10_stream_encoder.c | 577 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, in enc1_stream_encoder_hdmi_set_stream_attribute()
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/dragonfly/sys/dev/drm/radeon/ |
H A D | evergreen_hdmi.c | 237 WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset, in evergreen_set_avi_packet()
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H A D | rv770d.h | 714 #define HDMI_INFOFRAME_CONTROL1 0x7418 macro
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H A D | evergreend.h | 564 #define HDMI_INFOFRAME_CONTROL1 0x7048 macro
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/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | dce_v10_0.c | 1628 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, 2); in dce_v10_0_afmt_setmode() 1706 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, 2); in dce_v10_0_afmt_setmode()
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H A D | dce_v11_0.c | 1670 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, 2); in dce_v11_0_afmt_setmode() 1748 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, 2); in dce_v11_0_afmt_setmode()
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