| /dragonfly/sys/dev/drm/i915/ |
| H A D | intel_dsi_pll.c | 586 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_compute_dsi_pll()
599 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dsi_pll()
609 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_disable_dsi_pll()
648 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_dsi_reset_clocks()
|
| H A D | i915_sysfs.c | 250 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
582 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_setup_sysfs()
603 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_setup_sysfs()
621 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_teardown_sysfs()
|
| H A D | intel_dsi.c | 546 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_dsi_device_ready()
824 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_pre_enable()
929 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv) || in intel_dsi_clear_device_ready()
981 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_post_disable()
1038 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_get_hw_state()
1410 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_prepare()
1703 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_init()
1782 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_init()
|
| H A D | intel_psr.c | 384 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_psr_compute_config()
806 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_psr_single_frame_update()
937 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_psr_init()
957 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_psr_init()
|
| H A D | intel_dp.c | 847 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in edp_notify_handler()
875 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power()
889 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_vdd()
1499 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_dp_set_clock()
2895 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
2906 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_enable_dp()
3525 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_dp_set_signal_levels()
3668 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_link_down()
5035 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_dp_encoder_reset()
6055 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_dp_init_connector()
[all …]
|
| H A D | intel_uncore.c | 189 if (IS_VALLEYVIEW(dev_priv)) in __gen6_gt_wait_for_fifo()
395 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in check_for_unclaimed_mmio()
722 IS_VALLEYVIEW(dev_priv))
1161 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_uncore_fw_domains_init()
1288 if (IS_VALLEYVIEW(dev_priv)) { in intel_uncore_init()
1881 if (HAS_FWTABLE(dev_priv) && !IS_VALLEYVIEW(dev_priv)) { in intel_uncore_forcewake_for_write()
|
| H A D | i915_drv.c | 506 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_mchbar()
837 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_init_dpio()
1684 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
1881 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
2611 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
2659 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
2696 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
2716 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
|
| H A D | intel_cdclk.c | 430 if (IS_VALLEYVIEW(dev_priv) && min_cdclk > freq_320) in vlv_calc_cdclk()
2093 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_update_max_cdclk()
2129 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk()
2210 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_rawclk()
2231 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
2263 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_init_cdclk_hooks()
|
| H A D | intel_sprite.c | 97 bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_pipe_update_start()
1039 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_check_sprite_plane()
1077 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_sprite_set_colorkey()
1262 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_sprite_plane_format_mod_supported()
1329 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_sprite_plane_create()
|
| H A D | intel_audio.c | 474 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_disable()
531 } else if (IS_VALLEYVIEW(dev_priv) || in ilk_audio_codec_enable()
679 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_init_audio_hooks()
|
| H A D | intel_crt.c | 319 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_mode_valid()
503 if (IS_VALLEYVIEW(dev_priv)) in intel_crt_detect_hotplug()
913 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_init()
|
| H A D | intel_lpe_audio.c | 191 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
|
| H A D | intel_pm.c | 450 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_set_memory_cxsr()
6096 if (IS_VALLEYVIEW(dev_priv)) in gen6_set_rps_thresholds()
7917 else if (IS_VALLEYVIEW(dev_priv)) in intel_init_gt_powersave()
7960 if (IS_VALLEYVIEW(dev_priv)) in intel_cleanup_gt_powersave()
8018 else if (IS_VALLEYVIEW(dev_priv)) in intel_disable_rc6()
8037 else if (IS_VALLEYVIEW(dev_priv)) in intel_disable_rps()
8080 else if (IS_VALLEYVIEW(dev_priv)) in intel_enable_rc6()
8103 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_enable_rps()
9038 else if (IS_VALLEYVIEW(dev_priv)) in intel_init_clock_gating_hooks()
9400 else if (IS_VALLEYVIEW(dev_priv)) in intel_gpu_freq()
[all …]
|
| H A D | intel_device_info.c | 371 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_device_info_runtime_init()
|
| H A D | intel_display.c | 207 if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) in intel_update_czclk()
581 if (!IS_PINEVIEW(dev_priv) && !IS_VALLEYVIEW(dev_priv) && in intel_PLL_is_valid()
2068 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_linear_alignment()
5842 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_crtc_disable()
7102 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_set_pipeconf()
7508 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_get_pipe_config()
7580 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_get_pipe_config()
10545 if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in compute_baseline_pipe_bpp()
10828 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in clear_intel_crtc_state()
10842 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in clear_intel_crtc_state()
[all …]
|
| H A D | i915_gem_fence_reg.c | 556 if (INTEL_GEN(dev_priv) >= 8 || IS_VALLEYVIEW(dev_priv)) { in i915_gem_detect_bit_6_swizzle()
|
| H A D | intel_hdmi.c | 658 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_hdmi_set_gcp_infoframe()
1984 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_infoframe_init()
2100 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_hdmi_init()
|
| H A D | intel_dsi_vbt.c | 348 if (IS_VALLEYVIEW(dev_priv)) in mipi_exec_gpio()
|
| H A D | intel_i2c.c | 674 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_gmbus()
|
| H A D | i915_irq.c | 1964 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_hpd_irq_handler()
4035 if (IS_VALLEYVIEW(dev_priv)) in intel_irq_init()
4081 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
4097 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_irq_init()
|
| H A D | intel_runtime_pm.c | 2514 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_power_domains_init()
3009 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_power_domains_init_hw()
|
| H A D | intel_bios.c | 418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) in parse_general_features()
|
| H A D | i915_drv.h | 2994 #define IS_VALLEYVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_VALLEYVIEW) macro
4315 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_vgacntrl_reg()
|
| H A D | i915_gem_gtt.c | 176 if (IS_VALLEYVIEW(dev_priv) && dev_priv->drm.pdev->revision < 0xb) { in intel_sanitize_enable_ppgtt()
3418 else if (IS_VALLEYVIEW(dev_priv)) in gen6_gmch_probe()
|
| H A D | intel_panel.c | 1979 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_panel_init_backlight_funcs()
|