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Searched refs:LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h201 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x00000001 macro
H A Dsmu_8_0_sh_mask.h2806 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_0_0_sh_mask.h3784 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_1_sh_mask.h4626 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_0_1_sh_mask.h5218 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_0_sh_mask.h5410 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_2_sh_mask.h5596 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_3_sh_mask.h5706 #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 macro