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Searched refs:LCAC_MC3_CNTL__MC3_THRESHOLD_MASK (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h224 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x0001fffeL macro
H A Dsmu_8_0_sh_mask.h2841 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe macro
H A Dsmu_7_0_0_sh_mask.h3819 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe macro
H A Dsmu_7_1_1_sh_mask.h4661 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe macro
H A Dsmu_7_0_1_sh_mask.h5253 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe macro
H A Dsmu_7_1_0_sh_mask.h5445 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe macro
H A Dsmu_7_1_2_sh_mask.h5631 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe macro
H A Dsmu_7_1_3_sh_mask.h5741 #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe macro