Home
last modified time | relevance | path

Searched refs:LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h225 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x00000001 macro
H A Dsmu_8_0_sh_mask.h2842 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_0_0_sh_mask.h3820 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_1_sh_mask.h4662 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_0_1_sh_mask.h5254 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_0_sh_mask.h5446 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_2_sh_mask.h5632 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 macro
H A Dsmu_7_1_3_sh_mask.h5742 #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 macro