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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7598 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x02000000L macro
H A Ddce_8_0_sh_mask.h3197 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
H A Ddce_10_0_sh_mask.h3119 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
H A Ddce_11_0_sh_mask.h3189 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
H A Ddce_11_2_sh_mask.h3437 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK 0x2000000 macro
H A Ddce_12_0_sh_mask.h9267 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40016 #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON_OVRD_MASK … macro