Home
last modified time | relevance | path

Searched refs:LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7628 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT 0x00000008 macro
H A Ddce_8_0_sh_mask.h3220 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT 0x8 macro
H A Ddce_10_0_sh_mask.h3142 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT 0x8 macro
H A Ddce_11_0_sh_mask.h3212 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT 0x8 macro
H A Ddce_11_2_sh_mask.h3460 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT 0x8 macro
H A Ddce_12_0_sh_mask.h9289 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40038 #define LVTMA_PWRSEQ_DELAY1__LVTMA_PWRUP_DELAY2__SHIFT … macro