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Searched refs:MC_SEQ_CAS_TIMING_LP (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dbtcd.h148 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
H A Dbtc_dpm.c1861 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in btc_check_s0_mc_reg_index()
2028 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in btc_initialize_mc_reg_table()
H A Dnid.h806 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
H A Dsid.h574 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
H A Dcikd.h699 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
H A Devergreend.h324 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
H A Dni_dpm.c2775 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in ni_check_s0_mc_reg_index()
2882 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in ni_initialize_mc_reg_table()
H A Dcypress_dpm.c975 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_CAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
H A Dci_dpm.c4459 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in ci_check_s0_mc_reg_index()
4668 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in ci_initialize_mc_reg_table()
H A Dsi_dpm.c5433 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in si_check_s0_mc_reg_index()
5544 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in si_initialize_mc_reg_table()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsi_dpm.c5888 *out_reg = MC_SEQ_CAS_TIMING_LP; in si_check_s0_mc_reg_index()
5999 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in si_initialize_mc_reg_table()