Searched refs:MC_SEQ_MISC0 (Results 1 – 12 of 12) sorted by relevance
119 #define MC_SEQ_MISC0 0x2a00 macro
209 #define MC_SEQ_MISC0 0x2a00 macro790 #define MC_SEQ_MISC0 0x2a00 macro
285 #define MC_SEQ_MISC0 0x2a00 macro
551 #define MC_SEQ_MISC0 0x2a00 macro
676 #define MC_SEQ_MISC0 0x2a00 macro
736 tmp = RREG32(MC_SEQ_MISC0) & 3; in rv770_calculate_memory_refresh_rate()1599 tmp = RREG32(MC_SEQ_MISC0); in rv770_get_memory_type()
649 mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT; in ni_mc_load_microcode()
2537 tmp = RREG32(MC_SEQ_MISC0); in ci_register_patching_mc_arb()4572 tmp = RREG32(MC_SEQ_MISC0); in ci_register_patching_mc_seq()5127 tmp = RREG32(MC_SEQ_MISC0); in ci_get_memory_type()
1766 if (((RREG32(MC_SEQ_MISC0) & 0xff000000) >> 24) == 0x58) in si_init_microcode()5828 tmp = RREG32(MC_SEQ_MISC0); in si_lbpw_supported()
3209 tmp = RREG32(MC_SEQ_MISC0); in si_is_special_1gb_platform()4285 dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3); in si_calculate_memory_refresh_rate()
1918 tmp = RREG32(MC_SEQ_MISC0); in ci_mc_load_microcode()
3668 tmp = RREG32(MC_SEQ_MISC0); in si_is_special_1gb_platform()4750 dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3); in si_calculate_memory_refresh_rate()