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Searched refs:MC_VM_MB_L1_TLB0_CNTL (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770.c918 WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); in rv770_pcie_gart_enable()
959 WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); in rv770_pcie_gart_disable()
993 WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); in rv770_agp_enable()
H A Drv770d.h461 #define MC_VM_MB_L1_TLB0_CNTL 0x2234 macro
H A Devergreen.c2416 WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); in evergreen_pcie_gart_enable()
2455 WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); in evergreen_pcie_gart_disable()
2488 WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); in evergreen_agp_enable()
H A Devergreend.h951 #define MC_VM_MB_L1_TLB0_CNTL 0x2234 macro